1. Field of the Invention
The present invention relates to a squaring circuit for raising to the second power a binary number of n bits and more particularly to such a circuit including a table of squared numbers, which is stored in a nonvolatile memory element (i.e. ROM).
2. Discussion of the Related Art
Conventionally, a circuit for raising to the second power a binary number X is achieved by multiplying X by itself with a binary multiplying circuit. A binary circuit for multiplying 8-bit numbers requires approximately 1,500 transistors in conventional technologies and architectures. Such a conventional circuit is called a multiplier and a common drawback includes the large surface area used.
An alternative for achieving a squaring circuit of an 8-bit binary number X is to store in a ROM memory element all of the squares of n-hi t numbers and to select one of these squares by addressing one of the squares. This addressing occurs by applying number X on the address lines of the ROM. If number X is composed of n bits, 2.sup.n numbers of 2n bits will have to be stored in the ROM (the square of an n-bit number is a number including, at the most, 2n bits). Hence, in this example, a ROM of 2.sup.n .times.2n bits is required. A ROM including all the squares of 8-bit numbers includes approximately 1,900 transistors. Since these transistors are very orderly arranged, the ROM can be easily devised so as to occupy, for n&lt;10, an equal or even smaller silicon surface than an equivalent conventional multiplier circuit (using the same technology).